Speaker
Description
This paper presents the implementation and open-loop validation of a cavity emulator for the 1.3 GHz pulsed superconducting-cavity LLRF system under development in our group, for which the real cavity will not be available for an extended period. The emulator runs on an AMC-7Z045 board (Xilinx XC7Z045) and executes the cavity, RF-amplifier, coupler, beam, and detuning models as a pipelined fixed-point recurrence, including quench-like abnormal operation. All rate-dependent quantities are derived from a hardware-measured application clock, so the emulated plant retains its physical time scale across model rates from 3.125 to 10 MS/s. Validated on public operating data of a European XFEL cavity, parameters identified from 100 pulses predict 100 held-out pulses with 1.76\% complex and 0.56\% envelope NRMSE; the board reproduces the identified digital model to 0.002\%. A dedicated interface board, designed as a drop-in replacement for the cavity chain at the controller's existing signal interface, provides the converter-level reference plane. The present validation is open-loop; the common-clock controller-in-the-loop experiment through the interface board is specified and will be reported following hardware completion. The results establish that the emulator adds negligible numerical distortion to the validated plant model and can serve as a controlled substitute for controller commissioning before machine access.
