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MOST2 chip design meeting

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1. We had a details review of the test board design on both schematic and layout. Connections were checked pin by pin with related designers. The board design will be submitted very soon, and hopefully will be back in less than one month.

2. Zhang Ying discussed with related designers of some detailed definition of time sequence, and configuration bits for the user manual.

 

There are minutes attached to this event. Show them.
    • 15:30 → 15:50
      UserManual 20m
      Speaker: ZHANG ZHANG Ying (IHEP)
      Slides
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