Speaker
Description
The development of an energy and time measurement readout ASIC (TEPIX) for gas and large pixel semiconductor detectors is presented. It integrates 128 channel signal processing circuits and is targeting for detectors with pixel size of 0.5 – 2 mm for spectroscopic and imaging applications. Each channel consists of a charge integration front-end, a discriminator, the sample and hold circuits and a Wilkinson type ADC. The time of arrival (TOA) is measured by recording the clock counter when the discriminator is fired. The ASIC uses a charge integration front-end but operates in single particle mode. The signal will be firstly integrated in a switched integrator, followed by a CDS amplifier and discriminator to identify different events. The chip works at frame-based readout mode. In total 4-channel sample and hold units are integrated in each channel, which means that at most 4 events can be detected and recorded in a single frame. The signal integration, sampling and hold and the ADC conversion are pipelined in the ASIC to minimize dead time. The zero compression is also adopted to reduce the data bandwidth. Simulation results show good performance at 10 kHz frame rate with noise of about 130 electrons(ENC@0.5 pF detector capacitance). The main functions of this chip have been verified via electronic test for the first version. The second version has fixed several issues in the first version and is now received and under test. By fanning in signals with the substrate board, a 4-side buttable detector module without dead area can easily be achieved thus the fill factor is improved significantly.
