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21–26 Oct 2026
Sheraton Shanghai Jiading Hotel
Asia/Shanghai timezone

Development Status & Plans of Serial Powering at IHEP

Not scheduled
20m
3rd Floor Hallway

3rd Floor Hallway

Poster Presentation 07: Silicon Detectors Posters

Speaker

Tianyu Liang

Description

The increasing level of front-end integration in particle detector has placed new requirements for powering system, particularly in terms of material budget, power distribution, and system scalability. Serial powering, based on a constant current scheme with shunt-LDO regulars (SLDO), has been an attractive solution for large-scale detector systems and future collider upgrades.

This contribution presents the development status and future plans of serial powering R\&D at the Institute of High Energy Physics (IHEP), with applications to the LHCb Upstream Tracker and future Higgs-factory experiments such as CEPC.

\textbf{ATLASPix3-based SLDO tests: }The SLDO performance of ATLASPix3 chips has been systematically investigated using dedicated probe card and Single-Chip Carrier (SCC) setups. Both bare chip and chip with core cell configurations have been characterized. Four ATLASPix3 chips assembled on SCCs have been operated in series, demonstrating stable voltage regulation and functional outputs. Besides, A 1$\times$4 PCB based on a quad-flex layout has also been designed and produced for module-level serial-powering studies, with wire bonding and functional testing in progress.

\textbf{COFFEE/CHiR Chips with SLDO design: } To develop CMOS pixel sensors in a 55~nm HVCMOS processing with serial powering module, two different SLDO architectures have been implemented in the CHiR chip, including an approach following the ATLASPix3 design and another based on the RD53 architecture. Device sizes and types have been optimized for the shunt and pass devices, while an overvoltage tolerant design extends the applicable input voltage range beyond the nominal 1.2~V technology limit to approximately 2~V. Simulations have demonstrated stable regulation for both a single SLDO and a four-chip serial chain. A dedicated CHiR test PCB has been designed, with measurements planned to characterize SLDO output regulation, serial-chain operation, and load-transient response.

The ongoing development aims to demonstrate serial powering at module level and establish a practical powering solution for future low-material-budget tracking detectors, while supporting long-term collaboration with the ATLASPix community and the development of serial powering technologies.

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