Speaker
Description
AGORA is a detector concept developed from studies for the Circular Electron Positron Collider (CEPC), with extensions towards FCC-ee and other future colliders. It aims to support precision electroweak measurements, Higgs and flavour physics, and searches for new physics. In particular, the large samples of bottom- and charm-flavoured hadrons and τ leptons produced during Z-pole operation offer valuable opportunities for precise decay measurements and studies of rare processes, placing stringent requirements on track impact-parameter measurements and secondary-vertex reconstruction. These physics objectives require the innermost vertex detector layer to be positioned as close as possible to the interaction point, together with micrometre-scale spatial resolution, a low material budget, and high detection efficiency.
In addition to these requirements, the power constraints imposed by air cooling and the beam-induced backgrounds encountered during high-luminosity operation, particularly at the Z pole, demand high timestamp precision and high-rate readout capability. These performance requirements are coupled through charge collection, analogue front-end processing, and digital readout. Key factors, including charge sharing, discriminator threshold, and front-end response speed, affect spatial resolution, detection efficiency, timing performance, power consumption, and readout requirements, creating interdependent design trade-offs. Translating detector-level performance requirements into specific circuit parameters is therefore challenging. A unified description of these relationships is needed to guide the joint selection of front-end operating points, timing windows, and readout capacity.
This contribution proposes a methodology for determining circuit parameters from design requirements to guide the development of the AGORA vertex detector. The methodology combines charge-collection distributions and transient responses obtained from device simulations incorporating drift and diffusion with simulated front-end characteristics relating input charge to threshold-crossing delay. This establishes threshold operating ranges under detection-efficiency and noise constraints and evaluates the contribution of time walk to timestamp precision. Signal propagation, timestamping, and recovery processes are then incorporated to establish statistical descriptions of effective integration time, hit-association windows, and dead time. Target hit rates and intra-cluster correlations are subsequently used to evaluate pixel occupancy, hit losses, and data transmission requirements. By linking these quantities, the methodology translates detector design requirements into quantitative constraints on thresholds, front-end operating points, timing parameters, and readout configurations, providing a unified basis for circuit parameter selection and iterative optimisation under coupled performance requirements and power constraints.
