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21–26 Oct 2026
Sheraton Shanghai Jiading Hotel
Asia/Shanghai timezone

CMOS MAPS with intrinsic gain layer for tracking and timing

Not scheduled
20m
Junior Ballroom III

Junior Ballroom III

Oral Presentation 07: Silicon Detectors Silicon Detectors

Speaker

Philippe Schwemling (CEA-Saclay and Université Paris Cité)

Description

Future collider detectors will require tracking detectors with a detection surface of several hundreds of square meters, combined with requirements on spatial resolution of a few microns per track, coupled with as small power consumption as possible. Specialized sensors with a time resolution of 100 ps or better will also be required to add TOF capabilities to the detectors. MAPS sensors are flexible and promising candidates to reach all these goals at a reasonable cost, and their effectiveness as tracking detectors is already well established. A recent promising improvement is the addition of a PN junction close to the edge of the charge collecting diode. This junction acts as a charge multiplication layer, which improves time resolution and potentially gives more latitude in the analog front-end design. This concept is being studied within the DRD3 collaborattion. Results from amplified and non amplified sensors produced in Tower Jazz 180 nm process (CASSIA Project) and LFoundry 150 nm process (CACTUS) will be presented.

Primary author

Philippe Schwemling (CEA-Saclay and Université Paris Cité)

Presentation materials

There are no materials yet.