1. IE browser is NOT supported anymore. Please use Chrome, Firefox or Edge instead.
2. If you are a new user, please register to get an IHEP SSO account through https://login.ihep.ac.cn/registlight.jsp Any questions, please email us at helpdesk@ihep.ac.cn or call 88236855.
3. If you need to create a conference in the "Conferences, Workshops and Events" zone, please email us at helpdesk@ihep.ac.cn.
4. The max file size allowed for upload is 100 Mb.
21–26 Oct 2026
Sheraton Shanghai Jiading Hotel
Asia/Shanghai timezone

A 20.48-Gbps PAM4 transmitter with 2-tap FFE in 55 nm for high-energy physics experiments

24 Oct 2026, 11:36
18m
Function Room 11

Function Room 11

Oral Presentation 11: Electronics & Readout Systems Electronics & Readout Systems

Speakers

Mr Guorui Zhang (IHEP) Xiaoting Li (高能所)

Description

High-energy physics experiments require increasingly high-speed data transmission in front-end readout systems. Based on our prior designs and measurements, the 10-Gbps NRZ transmission is approaching the bandwidth limit of the 55-nm CMOS process. Consequently, PAM4 transmission technology, which doubles the data rate within the same analog bandwidth, presents an attractive alternative.
The proposed PAM4 transmitter comprises a phase-locked-loop (PLL), two 16:1 CMOS-logic serializers (MSB and LSB), current mode logic (CML) buffers, voltage-controlled delay cells (VCDLs), a PAM4 combiner, digital-to-analog converters (DACs) and a serial peripheral interface (SPI). The PLL and serializer circuits have been silicon-verified. To reduce area in the initial prototype, a much smaller PRBS7 pattern generator is used instead of the serializer, and the PLL is replaced by an external-clock receiver (equalizer).
The PAM4 combiner merges the MSB and LSB channels into a single data stream, providing an output current of 3 mA at a single eye height and a programmable biasing current for the vertical-cavity surface-emitting laser (VCSEL) ranging from 0.4 to 9.8 mA. A variant incorporating a peaking inductor is also implemented. The MSB channel consists of two identical LSB channels, each featuring a two-tap CML structure (referred to as the main tap and the post tap). The feed-forward equalizer (FFE) operates as a transversal filter based on a tapped delay line and the combiner. In the LSB channel, the main tap, driven by the original signals, serves as the driving stage with a tail current (M5) of about 6 mA. The post tap functions as the equalizing stage and is driven by the delayed signals. The FFE weight coefficient can be adjusted via a 4-bit tail current source (M6-M9) from 0 to 1.5 mA in 0.1-mA step. The tap delay is configured by a 10-bit DAC, providing a tuning range from 27 ps to 97 ps. By adjusting the weight coefficient and tap delay, an optimal eye opening can be achieved for a certain range of the channel loss.
Preliminary electrical test results indicate that the PAM4 transmitter operates correctly up to 20 Gbps. The three measured eye heights are 177, 193, and 193 mV after FEE (level-7), respectively. The overall power consumption is about 68.4 mW, including 15 mW (simulated) for the PRBS generator, 24 mW for the combiner alone, and the remaining power for the adjustable delay line operating with a 0.6-V control voltage.

Primary authors

Presentation materials

There are no materials yet.