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21-26 May 2017
Beijing International Convention Center
Asia/Shanghai timezone
Home > Timetable > Session details > Contribution details

Contribution oral

Beijing International Convention Center - Room 307
Semiconductor detectors

Operational Experience with the ATLAS Pixel Detector


  • Djama FARES

Primary authors


Run-2 of the LHC is providing new challenges to track and vertex reconstruction imposed by the higher collision energy, pileup and luminosity that are being delivered. The ATLAS tracking performance relies critically on the Pixel Detector, therefore, in view of Run-2 of LHC, the ATLAS experiment has constructed the first 4-layer Pixel detector in HEP, installing a new Pixel layer, also called Insertable B-Layer (IBL). Pixel detector was refurbished with a new service quarter panel to recover about 3% of defective modules lost during run-1 and an additional optical link per module was added to overcome in some layers the readout bandwidth limitation when LHC will exceed the nominal peak luminosity by almost a factor of 3.

The key features and challenges met during the IBL project will be presented, as well as its operational experience and Pixel Detector performance in LHC.