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1. Tianya reported some simulation results of the D flip-flop, and the customized designs. The customized designs showed larger setup time than the standard cell. However it still needed to further check whether or not this larger time will affect the global timing sequence, although the former global simulation didn't show a problem. The post simulation should also be further checked with the RC-modeling simulation.
2. Zhang Ying reported some simulation results of the pixel analog circuit. 4 chips were tested, however only one chip succeed in tuning the bias to the correct condition, due to the wrong voltage of the bandgap. It was also found that the current DAC can not output a correct range as simulation.
The tested chip can response to the injection pulse, and the noise performance was tested roughly by the maximum and minimum range of the reference value, and showed about 5e as the ENC. However, the output can only be captured by the oscilloscope trigger, only limited range can be tested. Therefore the test can only show that the tested chip is functional.
A different shape of the analog output was also observed when the discrimination stage was turned on or off. still needed to be understood.
3. We will prepare for the test board design of Tcpx2.
4. Raimon suggested that we extra the timing information of the pixel matrix, so as to build a timing library and the matrix can be treated as a black box, and easier to be co-simulated with the periphery.