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May 21 – 26, 2017
Beijing International Convention Center
Asia/Shanghai timezone

MiniDAQ1: a compact data acquisition system for GBT readout over 10G Ethernet

May 22, 2017, 2:18 PM
Room 305E (Beijing International Convention Center)

Room 305E

Beijing International Convention Center

No.8 Beichen Dong Road, Chaoyang District, Beijing P. R. China 100101
oral Trigger and data acquisition systems R3-Trigger and data acquisition systems(1)


Paolo Durante (CERN)


The LHCb experiment at CERN is undergoing a significant upgrade in anticipation of the increased luminosity that will be delivered by the LHC during Run 3 (starting in 2021). In order to allow efficient event selection in the new operating regime, the upgraded LHCb experiment will have to operate in continuous readout mode and deliver all 40MHz of particle collisions directly to the software trigger. In addition to a completely new readout system, the front-end electronics for most sub-detectors are also to be redesigned in order to meet the required performance. All front-end communication is based on a common ~5Gbps radiation-hard protocol developed at CERN, called GBT. MiniDAQ1 is a complete data-acquisition platform developed by the LHCb collaboration for reduced-scale tests of the new front-end electronics. The hardware includes 36 bidirectional optical links and a powerful FPGA in a small AMC form-factor. The FPGA implements data acquisition and synchronization, slow control and fast commands on all available GBT links, using a very flexible architecture allowing front-end designers to experiment with various configurations. The FPGA also implements a bidirectional 10G Ethernet network stack, in order to deliver the data produced by the front-ends to a computer network for final storage and analysis. An integrated single-board-computer runs the new control system that is also being developed for the upgrade, this allows MiniDAQ1 users to interactively configure and monitor the status of the entire readout chain, from the front-end up to the final output. MiniDAQ1 hardware is currently finalized and successfully used by several sub-detector groups within the collaboration, work is currently well underway on MiniDAQ2, which will feature a high-throughput readout protocol based on PCI Express in place of Ethernet. Firmware and software have already been designed so as to minimize the effort required to transition from MiniDAQ1 to its successor, which implements the final design that will be commissioned in 2019.

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