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CEPC Vertex detector TDR weekly meeting

→ Asia/Shanghai
    • 14:00 → 14:05
      Introduction 5m
      Speaker: 梁志均 LIANG Zhijun
    • 14:10 → 14:30
      Plan and tools for implementation of stitching layout in CEPCSW 20m
      Speaker: Chengdong FU (IHEP)
    • 14:10 → 14:30
      Vertex layout optimization 20m
      Speakers: Yulong Li (高能所), 田园 Tianyuan 张 Zhang
    • 14:25 → 14:45
      mechanics update 20m
      Speaker: Jinyu Fu (高能所)
    • 14:30 → 14:50
      sensor overall design 20m
      Speakers: Yunpeng LU (Institute of High Energy Physics, CAS), 浩 熊 (中国科学院高能物理研究所)
      20260910.pdf
      timestamp_integration 20260910.pdf
    • 14:40 → 15:00
      Process and Analog Frontend 20m
      Speaker: Ying ZHANG (IHEP)
    • 14:45 → 15:05
      Pixel readout logic 20m
      Speakers: 天涯 吴 (南昌大学), 彤 李 (南昌大学), 晗 郁 (中国科学院高能物理研究所)
      9.10_Chip pixel array delay model and Freeze insertion.pptx
    • 14:55 → 15:15
      Peripheral Readout 20m
      Speakers: Xiaomin Wei (Northwestern Polytechnical University), 元鸿 焦 (northwestern polytechnical university), 晗 郁 (中国科学院高能物理研究所)
    • 15:45 → 16:05
      Taichu3 Beta test 20m
      Speakers: Xiaomin Wei (Northwestern Polytechnical University), 元鸿 焦 (northwestern polytechnical university)
    • 16:00 → 16:20
      MDI background update 20m
      Speakers: Hancen LU (鲁函岑) (IHEP), Haoyu SHI (IHEP), Weiyi Sun
    • 16:20 → 16:40
      Taichu3 Beta testing 20m
      Speaker: Siqi Deng
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