2025 MicroTCA/ATCA International Workshop ​for Large Scientific Facility Control

14 Sep 2025, 09:00 → 17 Sep 2025, 19:30 Asia/Shanghai

2025 MicroTCA/ATCA International Workshop ​for Large Scientific Facility Control will be hosted by Chongqing University (CQU), in Chongqing, China on Sep.15-Sep.17, 2025. The workshop will be held on-site and online at the same time.

The workshop promotes and coordinates the development of MicroTCA/ATCA standards and systems in China and East Asia, especially in data acquisition, digital signal processing, measurements, instrumentations, controls, and analog circuit (Microwave/RF) applications in research facilities and industry. The workshop also provides a platform to discuss technologies and collaborations.

The workshop's main topics include:

• Applications in research facilities (accelerators, high energy physics, plasma, fusion, laser, photon beamlines, etc.)
• Applications in industry
• New products
• New technologies
• Future of standard and interoperability
• Software and firmware
• Industry exhibition – presentation of modules and systems from industry and research

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Workshop information

1. Venue location

   Kingworld Hotel, Chongqing, China (重庆君豪大饭店).

2. Time

   Sep.15 - Sep.17, 2025.

3. Registration location

    The 1st floor at the Kingworld Hotel, Chongqing, China.

4. Registration fee

• Early registration fee: 1800 CNY or 220 EUR or 250 USD (Valid until 3/8/2025 12:00:00)
• Registration fee for faculty members and pos.doc: 2000 CNY or 244 EUR or 278 USD
• Registration fee for exhibitors: 5000 CNY  or 610 EUR or 696 USD (The fee covers one person, each additional attendee incurs an additional cost of 2000 CNY per person)
• Registration fee for students and online participants: 1000 CNY or 122 EUR or 139 USD                                                

5. Invitation letter 

     If you need an Invitation Letter, please provide the following information by email to mtca.ws2025@cqu.edu.cn in advance.

• For foreign participants: a picture or scan of the passport information page
• For Chinese participants: basic personal information including name and affiliation

6. Accommodation

• Accommodation fee is not included in the registration fee
• Kingworld Hotel, Chongqing,China: for both foreign and Chinese participants

7. Meals and banquet

    The meals and banquet will be arranged by organization committee during the workshop. (The arrangement will be announced in the subsequent notifications).

poster.jpg

Workshop Announcement.pdf

Workshop programs.pdf

Monday, 15 September

Tutorial: part1

Convener: Rong Liu

1 Tutorial welcome

Speaker: Rong Liu

2 LHX liquid cooling solutions and multiple industry application scenarios

LHX is the cooling solution called Liquid-to-Air Heat Exchanger. LHX offers customers a differentiate cooling solution for electronic cabinets, enabling effective heat dissipation for high-performance electronic equipment. Whether deploying new equipment or upgrading existing equipment, it can quickly achieve high computing density and high-precision/high-speed measurement in a limited space. This article will introduce the basic concepts and system architecture of LHX and its application scenarios in multiple industries.

Speaker: Alex Mao (nVent SCHROFF)

1.2025-09-14 Luquid Heat-Exchanger (LHX) by nVent SCHROFF.pptx

3 Low-Level RF Systems Based on MicroTCA.4

This paper presents the design of low-level radio frequency (LLRF) systems based on the MicroTCA.4 standard for particle accelerators. LLRF systems regulate cavity field amplitude, phase, and resonance to ensure stable beam acceleration, while supporting high-speed data acquisition, diagnostics, and automated control. MicroTCA.4 offers high performance and modularity through AMC, RTM, and MCH modules, providing standardized distribution of clocks and triggers, redundancy, and intelligent management. Hardware implementations employ direct sampling and down-conversion schemes, with FPGA frameworks integrating PCIe, DMA, and DDR subsystems for real-time control and data acquisition. The use of Xilinx IP cores and open-source drivers enables efficient high-bandwidth data transfer, while EPICS integration facilitates system monitoring and operation. Results demonstrate that MicroTCA.4 delivers a standardized, cost-effective, and reliable platform, simplifying development and accelerating deployment of modern LLRF systems.

Speaker: Nan Gan

2.Low-Level RF Systems Based on MicroTCA.4.pptx

10:15 Coffee Break

Tutorial:part2

Convener: Rong Liu

4 Timing System in MicroTCA

Timing system provides high-precision trigger and clock signals while coordinating operations for entire accelerators and some related facilities. .This tutorial offer an introduction to timing system and the MicroTCA platform. And it uses HEPS (High Energy Photon Source) timing system as an example to illustrate how to build a timing system and why MicroTCA are used in some devices.

Speaker: Fang Liu

3.Timing System in MicroTCA.pdf

5 MicroTCA Management - how to become a MicroTCA expert in 30 minutes

Formerly known as a must-have from the communication market only, today’s applications demand a highly efficient system management which covers all aspects from the overall system view down to single sensors at board level. This requirement spreads through most of the vertical markets in industry and research as its implementation has a high impact on serviceability and operation of systems in all kind of environments. The tutorial will highlight how the common management approach IPMI (Intelligent Platform Management Interface) in the most recent open standards ATCA and MTCA answers the demands for i.e. high availability and reliability, remote service, fault detection and isolation field replacement including hot-swap, platform control and management of data streams. At the example of MTCA the attendee will be armed with an understanding on how to make best use of the system management in order to help him operate his system.

Speaker: Heiko Koerte (N.A.T. GmbH)

11:45 Lunch

6 Welcome speech

Welcome speech.pptx

Keynote speech

Convener: Bocheng Jiang

1.Jiang_Progress of the UTEF Low Energy Light Source_20250913.pdf

7 Progress of the UTEF low energy light source

The Ultrafast Transient Experimental Facility comprises two synchrotron light sources: one operating at 500 MeV and the other at 3.0 GeV. The 500 MeV low-energy light source, currently under construction, is the first synchrotron light source in western China. This presentation will introduce the design of the light source, outline the current progress, as well as future plans for the project.

Speaker: Bocheng Jiang (重庆大学)

Jiang_Progress of the UTEF Low Energy Light Source_20250913.pptx

Session: 1

Convener: Junqiang Zhang

8 Summary and Highlights of the 13th MicroTCA Workshop at DESY in Hamburg

In December 2024, the 13th "MicroTCA Workshop for Industry and Research" took place at DESY, Hamburg, Germany - more than 180 participants from 26 institutes and 25 companies joined the workshop. In 36 talks, hardware, firmware and software solutions have been presented and discussed. Also, for the first time, a pre-workshop on design rules and recommendations for MicroTCA hardware development was given, which was well-received by an expert auditorium. The presentation summarises the most critical R&D work carried out, informs you on the MicroTCA community's focuses, and highlights some of the key presentations from the 3-day workshop.

Speaker: Holger Schlarb (DESY)

2025-09-15-13th-MTCAWS_Summary_Schlarb_final.pdf

9 Progress in the Localization of MTCA Platforms and Applications

The Micro Telecommunications Computing Architecture (MTCA) chassis, as a carrier platform compliant with open standards, plays an essential role inhigh-end computing and communication systems. Notably, its domestic development is of great significance for achieving autonomy and controllability in China’s critical sectors. In compliance with the MTCA.4 specification, a complete set of MTCA chassis components has been developed and mass-produced. The chassis, manufactured from high-strength aluminum alloy, is compatible with 19-inch standard racks and supports both 2U (6-slot) and 10U (12-slot) configurations, providing flexible deployment for various application scenarios. The backplane, in conjunction with a self-developed MicroTCA Carrier Hub (MCH), supports a differential data rate of 10.3125 Gbps and establishes a high-speed data exchange center, which enables both local and remote communication between Advanced Mezzanine Card (AMC) modules and processors. The processor employs the Hygon CFU to ensure full domestic compatibility. Inside the chassis, secondary power conversion modules deliver up to 2000 W, while a Power Management (PM) module ensures per-slot voltage and current allocation as well as fault monitoring. A management module, developed with domestic chips, supports the Intelligent Platform Management Interface (IPMI) protocol and enables real-time monitoring of key parameters such as temperature, voltage, and fan speed. In addition, a high-performance Advanced Integrated Mezzanine Carrier (AIMC) board has been developed, with a Zynq processor as its core. This board supports both EPICS deployment and the integration of AI models.

Speaker: Hongrui Cao (中国科学院合肥物质科学研究院)

Progress in the Localization of MTCA Platforms and Applications.pdf

10 The update of CSNS-II RCS LLRF system based on MTCA.4

In the upcoming second phase of CSNS (CSNS-II), the beam power will be increased to 200–500 kW. To improve the bunching factor, three additional second-harmonic cavities loaded with MA material will be installed in the RCS. For the CSNS-II RCS LLRF system, we have decided to migrate from the CPCI bus-based hardware platform to the MicroTCA.4 architecture for the following reasons: First, several key components required for the custom CPCI backplane are no longer available, making it infeasible to upgrade the backplane to support additional FPGA controller cards for the new MA cavities. Second, the bandwidth limitations of the CPCI bus have already become apparent in the CSNS RCS LLRF system. The actual bandwidth utilization has exceeded 200 MB/s, approaching the maximum capacity of the CPCI bus. Unlike ferrite-loaded cavities, MA cavities—with their relatively low Q value—require dedicated monitoring and suppression of higher-order harmonics, which significantly increases data throughput within the LLRF system. The new MicroTCA.4-based LLRF system comprises 11 digital signal processing AMC modules paired with 11 corresponding analog signal RTM boards (8 sets dedicated to ferrite-loaded cavities and 3 sets for the MA second-harmonic cavities), along with a dedicated timing AMC module. The installation and commissioning of the entire system have already been completed.

Speaker: Wei Long (高能所)

The upgrade of CSNS-II RCS LLRF_modified.pptx

11 Development Progress of the Digital Low-Level RF System for the Hefei Advanced Light Facility

合肥先进光源（HALF）是一台基于衍射极限储存环的第四代同步辐射装置，由180 m的注入器和479.86 m储存环组成。储存环采用满能量注入方案，注入器需提供2.2 GeV的电子束流。注入器中使用基于MTCA.4架构的数字低电平射频（LLRF）控制系统，为加速管提供稳定可调的微波场。本报告介绍了为HALF注入器研制的LLRF系统，包括硬件结构和软件结构。硬件方面，对比原型系统，频率综合器的设计得到了改进，频综产生的时钟信号的相位噪声由110fs提升至30fs。软件方面，完成了上位机IOC与控制界面开发；在FPGA算法中，设计了Non-I/Q解调、CIC滤波、参考相位跟踪与VM矫正算法模块，提高了LLRF系统闭环稳定性。在实验室离线测试中，IQ闭环幅度和相位稳定性分别为0.016%(RMS)/0.016°(RMS)。在同步辐射实验室（NSRL）内高品质电子源平台进行的高功率测试中，IQ闭环幅度和相位稳定性分别为0.035%(RMS)/0.035° (RMS)。HALF对于LLRF系统的设计指标为离线测试幅度相位控制稳定度小于等于0.02%(RMS)/0.02°(RMS)，高功率测试幅度相位控制稳定度小于等于0.2%(RMS)/0.2°(RMS)。目前低电平系统已满足HALF设计指标。

Speaker: Kunlin Wu (中国科学技术大学国家同步辐射实验室)

5.Kunlin Wu-Development Progress of the LLRF for the HALF-V3.pptx

12 LO&CLK distribution RTM board development progress

We are developing an RTM board to generate and distribute Local and Clock signals for LLRF controller. 4 channels LO, 4 clock and 4 RF reference signals are desinged on the board for small scale applications. The PCB layout of the board has been finished, so the status of the board will be presented.

Speaker: Xinpeng MA (IHEP)

20250915-LO-CLK board.pdf

15:50 coffee break and group photo

Session: 2

Convener: Holger Schlarb

13 MicroTCA-based Motion Controller

Synchronous multi-axis motion control systems integrated with diagnostic and data acquisition subsystems are critical components in large experimental physics projects. To meet these specific requirements, DESY has developed an open-source motion control solution based on the DAMC-MOTCTRL board. Designed for projects like PETRA IV, this system enables synchronized control of up to 48 stepper motors on a single AMC board, interfacing with established control systems such as DOOCS, EPICS, and TANGO, or through a direct ASCII interface.

After presenting the alpha firmware version of this controller last year, significant progress has been made. The motor control logic has been substantially revised, enabling closed-loop operation with incremental encoders and other essential features. Synchronous control of up to 16 motors is now supported, with plans to scale to 48 in the near future. In parallel, work is ongoing to implement an industry-standard interface to synchronize motion control with other experimental devices.

This presentation will provide an overview of the hardware and firmware architecture, introduce the latest features, and outline the roadmap for the PETRA IV motion controller.

Speaker: Michael Randall (Deutsches Elektronen-Synchrotron DESY)

MicroTCA-based Motion Controller.pdf

14 Status Update on MicroTCA based Fast Orbit Feedback System for PETRA IV

PETRA IV is the upcoming fourth generation 6 GeV low-emittance light source
at DESY Hamburg. Two beam feedback systems are currently being developed.
The multi-bunch feedback system (MBFB), which minimizes bunch instability,
is based on an RFSoC design with newly developed hardware. The first board
designs and the local MBFB scheme are presented. The Fast Orbit Feedback
System (FOFB) for PETRA IV will be a large multi-input multi-output (MIMO)
control system in an extended star topology. The layout is optimised to
reduce latency between the 790 beam position monitors (BPM) and the 560 fast
correction magnets. The FOFB system is mainly based on MicroTCA technology.
The high-speed data transfer and distributed signal processing for the
centralised control scheme will be implemented on over 500 Advanced
Mezzanine Cards (AMC) in approximately 100 MicroTCA crates. The corrector
strength for the feedback is calculated centrally based on the global BPM
data. We present the orbit feedback topology, the modelling of the
individual subsystems and their interaction in the overall feedback scheme.

Speaker: Sven Pfeiffer

SPfeiffer_Status_FOFB_PIV_V0.pdf

15 Libera Brilliance X: MTCA.4 Readout Electronics for Electron Synchrotrons

Within the PETRA IV project at DESY, a new high-resolution Beam Position Monitor
(BPM) system based on MTCA.4 technology is being developed to meet the stringent
requirements of the low-emittance lattice. Building on the successful prototype phase, the
system has now been introduced under the commercial name Libera Brilliance X, a new
member of Instrumentation Technologies’ Libera family. The name emphasizes continuity
with the widely adopted Libera Brilliance+, while extending the concept into the modular
MTCA.4 platform.
The Libera Brilliance X system is built around two key application modules developed for
the PETRA IV project: the DAMC-UNIZUP AMC card, designed at DESY and licensed by
Instrumentation Technologies, and the Libera 2BPMRTM digitizer, developed at
Instrumentation Technologies. Leveraging the modularity of MTCA.4, these boards can be
integrated into various chassis, including compact form factors suitable for laboratory and
test-bench applications.
In this contribution, we present the current development status and the first laboratory test
results obtained with the Libera Brilliance X setup. The performance, modularity, and
application potential of the system will be discussed

Speaker: Manuel Cargnelutti

MTCA_Workshop_25_Manuel_Cargnelutti_talk.pdf

16 DESY MicroTCA Solutions: FPGA- and SoC-Based Platforms for Science Community and Next-Generation Research Facilities

In this talk, we present the DESY MicroTCA infrastructure and our MSK group digital hardware portfolio for scientific applications, with a focus on high-end RF analog and digital FPGA-based electronics deployed at facilities such as FLASH, XFEL, PETRA III, PETRA IV, and future DESY installations, all of which are based on the MicroTCA standard. A central element of the DESY MSK approach is cultivating an ecosystem in collaboration with industrial partners: maintaining core competencies in-house, sourcing standard components externally, and licensing hardware, firmware, and software to industry to simplify board procurement. The portfolio features a range of System-on-Chip (SoC)–based boards centered on the DMMC-STAMP, which provides MicroTCA management and a comprehensive software framework. This talk also reviews the recent MicroTCA cards, including the DAMC-FMC2ZUP (“Supercarrier”), the DAMC-UNIZUP (a universal, cost-optimized MPSoC board derived from the Supercarrier), the DAMC-DS5014DR (a high-speed, multi-channel gigasample digitizer based on AMD RFSoC), the DAMC-DS812ZUP (a 4- or 8-channel gigasample digitizer), and a MicroTCA motion controller that heterogeneously combines an MPSoC with a Kintex-7 FPGA. Finally, we discuss how our team actively supports the MicroTCA community by providing MicroTCA.4 and RTM design templates to encourage adoption and ensure board interoperability, as well as flexible laboratory development tools such as the MicroTCA Bring-up Adapter.

Speaker: Behzad Boghrati (Deutsches Elektronen-Synchrotron DESY)

2025-09-15-DESY MicroTCA Solutions-Behzad BOGHRATI.pdf

17 DESY MMC STAMP: Overview and recent improvements

The DMMC-STAMP SoM (DESY Module Management Controller System on a Module) is a ready-to-use management solution for operating target AMCs in MicroTCA systems. The stock firmware covers all mandatory MicroTCA management requirements, and with the optional DMMC-SDK, developers can add features such as remote FPGA console access, in-system FPGA updates, PMBUS power management, and AMC sensor integration.
This talk presents an overview of the DMMC-STAMP and enhancements driven by new AMC developments at DESY and customer needs, including support for multiple power management chips, serial-over-IPMB for multiple FPGAs, and FMC sensor integration into IPMI monitoring.

Speaker: Patrick Huesmann (DESY)

dmmc stamp mtcaws cn.pdf

18:30 Dinner

Tuesday, 16 September

Keynote speech

Convener: Yongbin Leng

1.Development and New Progress of a Universal Signal Processing Platform for Beam Diagnostics and Control.pdf

18 Development and New Progress of a Universal Signal Processing Platform for Beam Diagnostics and Control

To support the construction and upgrades of multiple large scientific facilities, several research institutions have parallelly developed specialized digital beam signal processing platforms, which have now been deployed in batches for engineering applications. However, under the current operational model—where small teams across different institutes independently conduct nearly identical hardware/software development work—there exists a lack of unified standards. This fragmentation prevents inter-institutional sharing of both hardware and software resources, while also hindering technical exchange. To address these challenges, with funding from the Major Facility Maintenance & Renovation Project of the Chinese Academy of Sciences, beam diagnostics and control teams from USTC, SARI, IHEP and IMP have jointly initiated the development of an universal signal processing platform for beam diagnostics and control. This paper presents the latest progress in this collaborative effort.

Speaker: Yongbin Leng

Development and New Progress of a Universal Signal Processing Platform for Beam Diagnostics and Control_Leng Yongbi.pdf

Session: 3

Convener: Hongrui Cao

19 RFSoC-Base LLRF Development for CSNS-II LINAC

​​RFSOC (Radio Frequency System-on-Chip) integrates FPGA, ARM processors, RF analog-to-digital converters ( RF ADCs), and RF digital-to-analog converters (RF DACs) onto a single chip, representing a third-generation leap in hardware technology following the shift from analog to digital circuits.​​ Applying RFSOC to accelerator systems ​​significantly enhances operational efficiency while substantially reducing development complexity, hardware maintenance burden, and overall cost.​​ This report ​​will survey​​ recent progress in utilizing RFSOC for accelerator applications, ​​analyze​​ relevant performance metrics, and ​​present​​ research and implementation work concerning RFSOC in the LLRF system of the China Spallation Neutron Source (CSNS) linear accelerator.

Speaker: Zhexin Xie (高能所,CSNS)

CSNS-II_LINAC_RF_mtca2025.pdf

20 The development of the MTCA.4 based LLRF system in the UTEF

The Ultrafast Transient Experimental Facility (UTEF) is a third-generation synchrotron light source, which consists of a 500MeV full-energy LINAC injector and a storage ring. The LINAC contains one thermionic cathode electron gun, one 500MHz Sub-harmonic buncher, one 3GHz buncher and nine 3GHz SLAC type accelerating tubes. 6 sets of MTCA.4 based LLRF system provide low noise RF phase and amplitude actuations and precise RF signal detections for the LINAC. Pulse-to-pulse feedbacks will be applied on amplitude and phase to achieve the RF stabilities. This talk gives an introduction of the development and measurement of the LLRF system.

Speaker: Junqiang Zhang

The development of the MTCA.4 based LLRF system in LUTF.pdf

21 Construction and testing of the low-voltage electronics test platform for Wuhan Advanced Light Source 1.0 GeV linear accelerato

武汉光源1.0 GeV电子直线加速器要求较小的发射度、低能散度、较高的束团电荷量和稳定性，因此对低电平控制系统提出了更高的性能要求。为满足这些需求，本文围绕直线实验室搭建的低压电子学测试平台展开研究，该平台集成了2998 MHz固态放大器、低电平控制系统以及信号分配与定时系统。固态放大器的测试结果显示，其输出功率大于1000 W，增益超过60 dB，幅相稳定性（RMS值）分别优于0.02%和0.02°，满足了加速器对微波信号高稳定性的要求。低电平控制系统的测试表明，其幅相测量分辨率优于0.01%和0.01°，并支持开环与闭环控制切换，反射保护响应时间小于1 ms，确保了系统的实时调节和反馈稳定性。信号分配与定时系统的测试结果表明，信号分配系统的相位晃动小于0.01°，定时输出信号相对晃动小于7 ps，定时延迟调节精度达到5 ps，且具备1/20时间调节功能，保证了多通道信号的同步性和精准触发。测试结果表明，该测试平台能够为1.0 GeV直线加速器的关键部件提供系统化测试，为后续工程建设和优化提供了坚实的技术支持。

Speaker: Hongwei Yue

Construction and testing of the LLRF test platform_Yue Hongwei.pptx

22 Low-Level Radio Frequency Control System for HUST-UED

ABSTRACT
Ultrafast electron diffraction (UED) is a crucial technique for investigating ultrafast microscopic dynamical processes in matter. In MeV-UED facilities based on radio-frequency (RF) electron guns, space-charge effects can be effectively suppressed. However, amplitude fluctuations of the microwave field and deviations in beam–wave phase synchronization inside the electron gun introduce energy and time-of-flight jitter, thereby limiting the spatiotemporal resolution of the system. To ensure the stable generation and acceleration of femtosecond electron bunches, it is therefore essential to achieve real-time monitoring and high-precision control of the RF signal amplitude and phase. This paper presents the design and implementation of the Low-Level Radio Frequency (LLRF) system for the Huazhong University of Science and Technology Ultrafast Electron Diffraction (HUST-UED) facility. The system features high-speed real-time signal processing, precise measurement and calibration of power parameters, and closed-loop feedback control based on a proportional–integral (PI) algorithm. This configuration effectively suppresses the adverse effects of microwave field amplitude and phase fluctuations on the energy stability of the electron beam. Experimental results demonstrate that the proposed system improves the root-mean-square (RMS) amplitude stability of the RF power injected into the electron gun to 0.0895%, while the RMS phase stability reaches 0.1349°. These results highlight that the developed LLRF system significantly enhances the stability of the RF field, providing a key guarantee for achieving and maintaining high spatiotemporal resolution in UED applications.
Keywords: ultrafast electron diffraction, LLRF, RF stability, digital signal processing, closed-loop control

Speaker: Changda Peng

2025 HUST-LLRF-Peng-f-5.pptx

10:05 Coffee Break

Session: 4

Convener: Chungming Chu

23 MicroTCA for photon beamlines - on-the-fly scans with spec

DESY is currently planning to upgrade the third generation synchrotron light source PETRA III to a state of the art diffraction limited storage ring. The new machine PETRA IV will make use of MTCA not only for the accelerator itself but also for the photon science experiments. In my presentation I will show possible applications of MTCA for experiment control and data acquisition at photon beamlines. One of the most important applications is motion control and on-the-fly/continuous scanning.
I will present a very efficient implementation of on-the-fly scanning based solely on MTCA hardware and the well known software package spec, which was realized at beamline P24 at PETRA III.

Speaker: Martin Tolkiehn (DESY)

mtcap4.pdf

24 Universal Dual-channel FMC Carrier Board based on the mTCA.4

To address the requirements of equipment interlock protection, time delay, and low-level tuning in linear accelerator systems, a universal dual-channel FMC carrier board based on the mTCA.4 standard has been developed. The board utilizes the Xilinx ZYNQ Ultrascale+ series chip, model XCZU19EG, equipped with two 64-bit DDR4 memories connected to the PS and PL respectively. It also supports PCIe3.0x4 and can be expanded to PCIe3.0x8.
The board is configured with two HPC sites. While one of the HPC sites does not have HB bank signals connected, all other pin signals are provided. The Zone.3 interface complies with the D1.1 standard protocol, ensuring compatibility with other related boards in the laboratory and supporting White Rabbit timing, among other features. Additionally, it includes one USB 3.0 interface, one Type-C interface, and one SD card slot, supporting multiple boot modes.
The PCB layout has been initially completed, and functional testing of the MMC module is currently underway.

Speaker: Yajie Mu (中国科学院高能物理研究所)

Universal Dual-channel FMC Carrier Board based on mTCA.4-Eng.pdf

25 The fast protection system for CSNS-II

To ensure the safe and stable operation of the China Spallation Neutron Source Phase II (CSNS-II), a fast protection system has been designed based on the Advanced Telecom Computing Architecture (ATCA) and Radio Frequency System on Chip (RFSoC). This approach offers several salient features: (1) adopting the architecture based on standard ATCA hardware and rocket I/O with high-speed serial links, achieving a high level of stability and operational reliability; (2) integrating a point-to-point interconnection structure by means of a custom-designed backplane that connects a core board with multiple interface boards housed in a standard chassis, thus enhancing application-layer flexibility and scalability; (3) utilizating the RFSoC’s architecture of efficient parallel processing and ultra-low-latency response, along with the realization of embedded EVR capabilities. This paper presents the design principles, hardware architecture, data processing mechanisms, reliability features, and the current development status. Additionally, the proposed system also provides an applicable reference model for similar applications, meeting the stringent demands of high-speed data acquisition and real-time processing.

Speaker: PENG ZHU (高能所)

The Fast Protection System for CSNS-II20250916.pptx

26 Design of the HEPS FOFB System Based on an ATCA Platform

Speaker: Guodong Gao (IHEP)

Design of the HEPS FOFB System Based on an ATCA Platform.pdf

27 Introduction to Control and Data Acquisition Systems for Shanghai Synchrotron Radiation Facility Experimental Stations

.

Speaker: Ying Zhao (SARI)

Introduction to Beamline Control and Data Acquisition Systems at SSRF_Zhaoying.pptx

12:10 Lunch

28 UTEF visit

17:00 Banquet

Wednesday, 17 September

Keynote speech

Convener: Cong Tan

29 Dual-Wheel Drive Accelerates the Development of the Artificial Intelligence Industry

Currently, AI technology is demonstrating a development trend of multipoint breakthroughs and interdisciplinary convergence. At the algorithm level, breakthroughs in large model technologies have driven generative AI to achieve qualitative leaps, while technologies such as deep reasoning and multimodal fusion continue to expand cognitive boundaries. At the computing level, the energy efficiency ratio of AI chips continues to improve, and extreme engineering optimization enables sustained computing power release. At the data level, high-quality industry datasets and synthetic data provide new momentum for model training and application development. Technological iterations are accelerating AI industrialization and driving intelligent applications across industries to flourish. AI technology is speeding up the "innovation-transformation-application" cycle, injecting new productive forces into various sectors and promoting the co-evolution of technological and economic systems, thereby reshaping industrial value networks. This presentation will cover the current state of AI development, challenges facing infrastructure, and future trends, aiming to exchange insights and discuss future prospects with all participants.

Speaker: Tan Cong

1.双轮驱动人工智能产业加速发展.pdf

Session: 5

Convener: Martin Tolkiehn

30 Precision Timing & Advanced RF Solutions for Particle Accelerators

KVG Quartz Crystal Technology GmbH is a professional frequency control products manufacturer, focusing on research, development, production and sales. High-end crystal oscillators are our specialty. We cooperate with DESY for the production and test of the Master Oscillator (MO) module, the Local Oscillator Generation (DeRTM-LOG) module and X-Band middleware. The MO provides 1.3 GHz reference for modern accelerators with excellent phase noise, sub-fs jitter and high-power output. The DeRTM-LOG module is a critical component in LLRF systems generating local oscillator, RF reference and clock signals for the MicroTCA.4 standard. Currently the DeRTM-LOG 1.3GHz and 1.5GHz are available. X-Band middleware, including X-band Local Oscillator Generation Module (XLOGM) and X-band Downconverter Module and Upconverter (XDWCM_UPC), are employed to convert between the S-band 3 GHz and X-band 12 GHz frequencies.

Speaker: Jiaoni Bai (KVG Quartz Crystal Technology GmbH)

KVG_Presentation_DESY_Module_2025.pptx

31 The latest developments in the MTCA.4 architecture and corresponding thermal solutions

Big Science projects require equipment platforms to achieve higher performance, precision, stability, and can be deployed in a smaller space. The corresponding MTCA.4 standard has been upgraded. This article will focus on the latest upgrades to the MTCA .4 standard in terms of base platforms, as well as the development of corresponding thermal solutions.

Speaker: Alphonso Liu (nVent SCHROFF)

2025-09-17 - Next Generation MTCA.4 Crate.pptx

32 The independently controllable MTCA system platform

The independently controllable MTCA system platform aims to provide a standardized, compact, low-cost, modular, scalable, and highly reliable comprehensive processing platform for large scientific facility. The MTCA platform includes CPU modules, MCH modules, acquisition modules, and I/O modules. All the modules are independently developed which can offer product selection and system solution support for most large scientific facility.

Speaker: Bo Li (JiaYuTaiLian)

The independently controllable MTCA system platform.pdf

33 In collaboration with Struck Innovative Systeme GmbH

Struck Innovative Systeme GmbH, a Hamburg-based leader in board-level electronics, has been at the forefront of innovative solutions for high-energy physics instrumentation for over 30 years. Specializing in particle accelerator large-scale facilities, our focus lies in microwave low-level RF (LLRF) control systems, delivering compact, high-performance board-level products that ensure precise beam stability and synchronization. These solutions, built on advanced xTCA (µTCA/ATCA) architectures, include direct sampling vector modulators (e.g., DS8VM1 MTCA.4 RTM) and FPGA-based digitizers tailored for real-time signal processing in demanding accelerator environments.

Complementing our LLRF portfolio, Struck provides digital data acquisition systems for physics experiments, particularly for detector applications. Our high-speed, high-resolution digitizers and VME interfaces (such as SIS1100e2/SIS3104-2 PCI Express to VME and SIS3153 Ethernet/USB3.0 to VME) enable seamless data capture from radiation detectors, supporting everything from beam monitoring to event reconstruction in collider experiments. These commercial off-the-shelf yet customizable modules leverage state-of-the-art broadband converters and integrated circuits, addressing hardware obsolescence while offering bespoke firmware design and system integration services.

With a proven track record of dedication and reliability, Struck serves a global clientele spanning renowned research institutes (e.g., CERN, DESY) and leading universities worldwide. Our lean, expert team—comprising engineers with deep domain knowledge—drives cutting-edge innovations that push the boundaries of accelerator technology, ensuring scalability, low latency, and robustness for next-generation facilities like the large Collider construction in the future.

This workshop presentation will explore real-world case studies, product demonstrations, and future roadmaps, highlighting how Struck’s solutions empower physicists to achieve unprecedented precision in particle acceleration and detection.

Speaker: Rong Liu (STRUCK)

struck-china-mtca-20250917@cqu.pptx

10:05 Coffee Break

Session: 6

Convener: Zeran Zhou

34 The design and development of control system in the UTEF

The Ultrafast Transient Experimental Facility (UTEF) is an accelerator-based multidiscipline user facility to be constructed in Chongqing, China, which comprises two synchrotron light sources: one operating at 500 MeV and the other at 3.0 GeV. The 500 MeV low-energy light source, currently under construction, is the first synchrotron light source in western China, which consists of a 500MeV full-energy linac injector and a storage ring. This talk introduces the design and development of the control system.

Speaker: Mingtao Kang (重庆大学)

The design and development of control system in the UTEF.pptx

35 IOC deployment and management system based on container technology

Speaker: Junhua Zhu (IASF)

7.IOC deployment and managem based on container technology.pptx

36 Introduction to Beamline Control at SSRF

Speaker: Xuying Lan (SARI)

37 Detector Control System for CEE

Speaker: Min Li (IMP)

38 Simulation of ADRC Application in Radio-Frequency Cavity

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Speaker: Xue Yang (CQU)

Simulation of ADRC Application in Radio-Frequency Cavity9.15.pdf

12:10 Lunch

Session: 7

Convener: Xinpeng Ma

39 Introduction to DESY’s firmware framework FWK

In recent years, DESY has developed an open-source FPGA firmware framework, known as FWK, to streamline and accelerate FPGA development in the scientific community, especially with MicroTCA hardware. At its core, the framework serves as an abstraction layer that simplifies the use of various FPGA vendor tools, facilitates IP integration, and helps with documentation generation. Additionally, FWK can generate a tailored embedded operating system based on Yocto or FreeRTOS to create and build more advanced firmware stacks for modern heterogeneous processing architectures.

This presentation will provide an overview of the FWK framework and its application using the PETRA IV motion controller project as a real-world example.

Speaker: Michael Randall (Deutsches Elektronen-Synchrotron DESY)

Introduction to DESY’s firmware framework FWK.pdf

40 Systemetic approach for accelerator controls

Modern accelerator-based user facilities are taking advantage of recent artificial intelligence (AI) boom. Regardless a newly planned facility or an existing one, all should implement a well-suited control system to support advanced tasks with AI technologies. This talk illustrates an architecture design to cover as much possible future application supports at reasonable cost. The talk will first give background introduction for AI and potential issues. A realistic design with possible applications utilizing latest technologies is presented. Additionally, a complete data infrastructure for supporting applications is also shown.

Speaker: Chungming Chu (NJU/Suzhou Lab)

2.Systematic Approaches for Accelerator Controls_final.pptx

41 Introduction to Experimental Station Control at SSRF

Speaker: Yongnian Zhou

42 Research and development of the timing system for CSNS-II accelerator

The China Spallation Neutron Source (CSNS) successfully achieved its design power level of 170 kW in 2025. The CSNS-II project aims to increase the beam power to 500 kW by enhancing the linac energy to 300 MeV. To ensure coordinated operation across all accelerator subsystems amidst increasing complexity and precision requirements, the timing system has been redesigned with an event-driven architecture to meet the stringent synchronization demands of the upgraded facility. A new generation of domestically developed generic control and data acquisition AMC modules has been introduced to fulfill the timing system requirements of CSNS-II. These modules comply with the MicroTCA.4 standard and are built around the Xilinx Zynq-7045, capable of running EPICS IOC applications and responsible for generating and distributing synchronized clock signals and trigger events throughout the facility, providing a common time base for time-correlated data acquisition. This article provides a comprehensive overview of the timing system, detailing the master-slave architecture, a method for precise clock and trigger synchronization, and prototype test results of the CSNS-II accelerator.

Speaker: Sinong Cheng (Institute of High Energy Physics)

Research and development of the timing system for CSNS-II accelerator-chengsn.pptx

43 The design of timing system for S3FEL

Speaker: Ting Liu

4.The design of timing system for S3FEL.pptx

44 MicroTCA developments and history at DESY

The advances in digitisation, processing power, and sensor technology enable today’s new types of scientific machines to achieve significant performance improvements and new capabilities. At the same time, and as a result, the load and impact on controlling such large-scale research facilities have also increased: providing excellent availability, top beam quality and stability, multimodal operation, as well as good maintainability, a short mean-time-to-repair, longevity, and ease of component exchange.

In 2005, significant reliability concerns for the 30 km-long linear TESLA collider prompted a discussion on adopting a more modern electronics standard to address the limitations of 25-year-old VME crate systems. To leverage Telcom’s advances, a working group was established between industry and physics laboratories within the non-profit standardisation organisation PICMG (PCI Industrial Computer Manufacturers Group). After only 2 years of intensive work, in 2011, the MicroTCA.4 standard was introduced. MicroTCA.4 combines the specific needs of our physics community, such as widely distributed systems, ample rear panel I/O to accommodate all signals, precise timing, space for analogue pre-processing, with the benefits of the Telcom system, including ultra-high data rates, configurability, remote management, and redundancies.
At the European XFEL, the MicroTCA.4 standard was deployed in 2016, marking its first use in a large-scale research facility. In this presentation, we will discuss the steps taken by DESY to address initial interoperability problems, expand the product range, promote the MicroTCA standard within industry and research, and offer an outlook on the latest developments.

Speaker: Holger Schlarb (DESY)

2025-09-17-xx#-MicroTCA_at_DESY_HolgerSchlarb.pdf

15:30 Coffee Break

45 Round table Discussion

46 Close out

close out.pdf